Our highly experienced team of RTL designers can tackle the most complex projects you can imagine.
In our 15 years of experience, we have worked on high performance x86 and ARM cores, designed complete cache subsystems, implemented various Networks-on-Chips (ring, mesh), and high performance memory controllers, so just imagine what we can do for your next project!
Our areas of expertise include all the spectrum from technical documentation to post-silicon validation and including micro-architecture design, specification and implementation, protocols, area/timing/power convergence, low-power design, high performance pipelines, design for testing/debugging, performance validation & correlation, floorplanning, Cadence/Synopsys/ARM tools and more.
Our team of verification experts can guarantee you the functionality of the most complex RTL designs.
The team offers a wide range of verification spectrum, from detailed Test plan creation to very detailed coverage points that guarantee quality and bug free designs. The expertise extends from system to module level validation. The deep experience in very complex designs make us think out of the box, innovate and deliver in time high quality designs in a very wide range of the digital world.
Plan: Based on the specifications of the architecture team,
We strategize our methodology
We architect out testbeches/checkers/assertions/coverpoints/....
We decide the priorities and the sequence of tasks and
We document everything
Build: Based on the document of the Plan phase, we create/integrate/debug our testbech/checkers/assertions/coverpoints based on reusable methodologies.
Run: Based on the Stimulus created on build phase, we hunt, find(using state of the art bug catching techniques) and resolve RTL bugs.
Cover: Based on the coverage plan of build phase, we measure Functional Coverage and analyse,extend,adjust with target the closure.
Whether you're trying to accelerate a slow algorithm, or you need new IP on your FPGA to process your custom protocol, we can deliver a turnkey solution to accelerate your current computing problems.
Your business is currently bottlenecked on a piece of software that simply takes too long and you're looking for some form of hardware acceleration. Be it a bioinformatics matching algorithm or an oil-and-gas drill predictor, you found what you needed. We can analyze your algorithm to understand its performance bottlenecks. From our findings, we will immediately deliver optimizations in your current platform if possible (without adding the FPGA at first). Then, we will use our extensive algorithmic and FPGA expertise to derive the best hardware mapping of your problem to the FPGA of your choice. We will adapt our solution to your budget and constraints.
We can create custom IP for your project and we can help integrate it with the rest of your FPGA design.
We will work with your specs and deliver verified and timing-clean RTL that match the performance you requested.
We have specific expertise in creating custom IP for:
Machine learning acceleration Deep Packet Inspection 2D/3D Video Rendering (shader core, rasterizer, texture sampling)
If you have an IP that has not been updated in a while, it probably is lagging in performance and features and is not taking advantage of the latest FPGA technology. We offer you to analyze your RTL, re-map it to the latest technology and, in the process, add any features you'd like to have and can not afford with your current in-house resources. We can help you improve your IP's per-cycle performance, reduce its power or optimize the resources it uses.
We can help you with
HDL Programming New IPs to be included in your FPGA Design Modifications to reduce utilization, reduce power or improve performance Simulation and Verification Debugging Timing closure to your target
If you have a concept in mind and you don't have the in-house skills to bring it to market, we can take your idea and turn it into a complete architecture specification.
We can also help you select the right partners for each of the resulting subsystems and bring your vision to market.
Our team has architected a wide variety of IPs: in-order low power cores, out-of-order cores, ring-based and mesh-based networks-on-chip, cache subsystems, memory controllers, AMBA/AHB/AXI interfaces and bridges, CoreSight solutions, custom debug units, .... you name it and we can do it!.
When it comes to performance analysis, we go by Deming's quote: "In God we trust; everyone else must bring data".
With over 15 years of experience writing and using performance models, we can custom build a solution to your exact needs.
From a virtual platform using licensed tools from ARM to a full-custom systemC or C++ solution we can connect at any point of your simulation and analysis flow. We have experience in both commercial offering as well as open-source components.
So whatever your current performance bottleneck is we can help you write and use the tools needed to pin-point the issue and quantitatively determine the solutions needed to fix it.