In The Media

March 4th, 2025
Semidynamics' Aliado SDK Accelerates AI Development for RISC-V with Seamless ONNX Integration

Semidynamics, the leading IP company for high performance, AI-enabled, RISC-V processors, has announced its support for the ONNX Runtime and the availability of its RISC-V Software Development Kit (SDK), Aliado.

March 4th, 2025
Semidynamics’ Aliado SDK accelerates AI development

Semidynamics has announced its support for the ONNX Runtime and the availability of its RISC-V Software Development Kit (SDK), Aliado.
Semidynamics has integrated support for its hardware into ONNX Runtime, enabling end-users to seamlessly integrate AI into their applications. The ONNX project, originally developed by Microsoft, defines a common standard for AI models and all major AI frameworks support importing or exporting ONNX-format models. Most open-source AI model repositories, such as HuggingFace, already provide models in the ONNX format enabling ONNX users to import practically any model currently available, without any model compilation step.

March 4th, 2025
Semidynamics launches RISC-V SDK, adds ONNX Runtime support

Semidynamics in Spain has integrated support for its RISC-V AI accelerator hardware IP into the ONNX Runtime environment with the launch of a software development kit (SDK).
This allows the Aliado SDK to provide debugging and fine-tuning of AI applications running on the custom RISC-V vector engines. The ‘all-in-one’ IP can be integrated into chip designs to accelerate AI applications where the portability of the software, including large language models (LLMs) with up to 7bn parameters is a key factor.

March 4th, 2025
Semidynamics’ Aliado SDK Accelerates AI Development for RISC-V with Seamless ONNX Integration

Semidynamics has integrated support for its hardware into ONNX Runtime, enabling end-users to seamlessly integrate AI into their applications. The ONNX project, originally developed by Microsoft, defines a common standard for AI models and all major AI frameworks support importing or exporting ONNX-format models. Most open-source AI model repositories, such as HuggingFace, already provide models in the ONNX format enabling ONNX users to import practically any model currently available, without any model compilation step.

On top of the ONNX format, the ONNX-Runtime can then take ONNX models and execute them in a variety of hardware. It also provides a suite of tools to perform model optimization and even quantization. With the newly integrated support for Semidynamics hardware, end-users will be ready to develop their AI applications from day one.
 

March 4th, 2025
Semidynamics launches RISC-V SDK, adds ONNX Runtime support

Semidynamics in Spain has integrated support for its RISC-V AI accelerator hardware IP into the ONNX Runtime environment with the launch of a software development kit (SDK).
This allows the Aliado SDK to provide debugging and fine-tuning of AI applications running on the custom RISC-V vector engines. The ‘all-in-one’ IP can be integrated into chip designs to accelerate AI applications where the portability of the software, including large language models (LLMs) with up to 7bn parameters is a key factor.

March 3rd, 2025
Semidynamics 的 Aliado SDK 通过无缝集成 ONNX 加速 RISC-V 的人工智能开发

高性能人工智能 RISC-V 处理器领域的领先 IP 公司 Semidynamics 宣布支持 ONNX Runtime,并推出其 RISC-V 软件开发工具包(SDK)Aliado。

Semidynamics 已将对其硬件的支持集成到 ONNX Runtime 中,使最终用户能够将人工智能无缝集成到其应用中。ONNX 项目最初由微软开发,定义了人工智能模型的通用标准,所有主要的人工智能框架都支持导入或导出 ONNX 格式的模型。大多数开源人工智能模型库(如 HuggingFace)已经提供了 ONNX 格式的模型,使 ONNX 用户几乎可以导入任何现有模型,而无需任何模型编译步骤。

February 26th, 2025
RISC-V 在 AI 计算的前景

RISC-V 在 AI 计算的前景
近日,Semidynamics 首席执行官 Roger Espasa 讨论了该公司的高性能、可配置 RISC-V IP,该 IP 强调内存带宽和针对 AI 和 HPC 的定制。他重点介绍了他们的 
本文引用地址:https://www.eepw.com.cn/article/202502/467325.htm
近日,Semidynamics 首席执行官 Roger Espasa 讨论了该公司的高性能、可配置 RISC-V IP,该 IP 强调内存带宽和针对 AI 和 HPC 的定制。他重点介绍了他们的 Gazzillion Misses 延迟处理 IP、集成张量单元,并专注于实际性能而非基准测试。Espasa 认为 RISC-V 正在超越 Arm,在标准化与灵活性之间取得平衡,并预测 AI 和 chiplet 的采用将发生转变。

February 25th, 2025
Baya Systems and Semidynamics Collaborate to Accelerate RISC-V System-on-Chip Development

Baya Systems, a leader in system IP technology that empowers the acceleration of intelligent compute, and Semidynamics, a provider of fully customizable high-bandwidth and high-performance RISC-V® processor IP, today announced a collaboration to boost innovation in development of hyper-efficient, next-generation platforms for artificial intelligence (AI), machine learning (ML) and high-performance computing (HPC) applications.

February 25th, 2025
Baya Systems, Semidynamics Expands RISC-V Ecosystem for SoC Designers

Baya Systems, Semidynamics Expands RISC-V Ecosystem for SoC Designers

Baya Systems and Semidynamics established a partnership to foster innovation in the creation of next-generation, ultra-efficient platforms for applications including high-performance computing (HPC), machine learning (ML), and artificial intelligence (AI).

February 24th, 2025
Semidynamics: The landscape for RISC-V and AI compute

Semidynamics CEO Roger Espasa discusses the company’s high-performance, configurable RISC-V IP, which emphasizes memory bandwidth and customization for AI and HPC. He highlights their Gazzillion Misses latency-handling IP, integrated tensor units, and focus on real-world performance over benchmarks. Espasa sees RISC-V gaining ground on Arm, balancing standardization with flexibility, and predicts a shift in AI and chiplet adoption.

February 24th, 2025
Semidynamics: The landscape for RISC-V and AI compute

Semidynamics: The landscape for RISC-V and AI compute

An interview with Semidynamics CEO Roger Espasa.

Semidynamics CEO Roger Espasa discusses the company’s high-performance, configurable RISC-V IP, which emphasizes memory bandwidth and customization for AI and HPC. He highlights their Gazzillion Misses latency-handling IP, integrated tensor units, and focus on real-world performance over benchmarks. Espasa sees RISC-V gaining ground on Arm, balancing standardization with flexibility, and predicts a shift in AI and chiplet adoption.

February 13th, 2025
RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?

—Second in a three-part series. You can read the first article here
While there are hundreds of companies that adopt Arm technology, not many of them develop their own custom cores. Something similar will likely happen in the case of RISC-V: companies that need a very specific core and control of their firmware and software stack will be more inclined to design a core from scratch.
For example, Seagate and Western Digital use custom RISC-V cores for their storage controllers. Companies that need to run a lot of off-the-shelf software will prefer off-the-shelf cores or even Arm or x86 CPUs.

February 6th, 2025
2025 Outlook with Volker Politz of Semidynamics

2025 Outlook with Volker Politz of Semidynamics

Key Takeaways
Founded in 2016, Semidynamics evolved from a design service company to a provider of customizable 64-bit RISC-V processor IP starting in 2019.
In 2024, a key highlight was the announcement of UPMEM choosing Semidynamics' IP for large language models, leading to inquiries from other semiconductor companies.
Semidynamics stands out by enabling precise customization of its All-In-One AI IP, allowing clients to differentiate their products.

January 6th, 2025
RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?

—First in a three-part series
Introduced in 2014, the RISC-V instruction set architecture has been evolving at a pace that Arm and x86 ISAs have never experienced. Initially, RISC-V cores were used solely for microcontrollers and applications that did not require high performance, but rather benefited from low cost and low power. Since RISC-V is an open-source architecture, it quickly gained popularity among dozens and then hundreds of companies, each of which contributed to further development of the ISA.
Nowadays, there are tiny RISC-V cores suitable for microcontrollers and DSPs, more advanced cores suitable for SSD controllers, Linux-capable cores for embedded applications, specialized cores that can be used for AI workloads, and “fat” cores that can serve data center and high-performance computing (HPC) applications.

December 16th, 2024
Semidynamics details All in One AI processor technology

Machine Learning and AI are fast moving targets, with new deep learning mechanisms being proposed every few months. Therefore, solutions based on fixed-function accelerators are too rigid and tend to lose relevance over time with advances in ML algorithms.
Semidynamics in Spain has developed an all in one architecture that fuses CPU, GPU and NPU. This novel system is composed of multiple IP elements, where each element consists of a RISC-V core, a Vector Unit (VU) and a Tensor Unit (TU). Semidynamics provides a powerful out-of-order 64-bit core based on RISC-V ISA, that includes Gazzillion Technology to efficiently manage large data sets that are common in AI/ML.

December 16th, 2024
EDACafe Industry Predictions for 2025 – Semidynamics

Semidynamics on 2025: Trends, Challenges, and Our Vision
Major Tech Shifts in 2025
The AI processor industry in 2025 is on the brink of transformation. With AI infiltrating every corner of technology, three key trends are set to define the year:
First, AI will be everywhere. AI is moving out of elite data centers and into edge devices, personal tech, and industrial systems. This shift demands processors that deliver high computational power without compromising on energy efficiency, scalability, or cost. Current leaders like Nvidia are hitting limits—environmentally, economically, and in production capacity—leaving room for new players to rise.

December 11th, 2024
Semidynamics RISC-V AI IP selected for LLM applications

A leading IP company for high performance, AI-enabled, RISC-V processors, Semidynamics has announced that it has been selected by UPMEM as its core provider for its next generation of LPDDR5X Processing In Memory (PIM) device.
The standard RISC-V architecture with the integrated Tensor Unit along with the long latency, data access optimizer named Gazillion, allows a seamless and efficient integration of any AI or LLM models. The Tensor Unit performs matrix multiplications required by AI. It offers low power operation, is easy to program as no DMAs are needed and provides universal RISC-V compatibility by working under any RISC-V vector-enabled Linux without any changes.

December 10th, 2024
UPMEM Chooses Semidynamics RISC-V AI IP for LLMs


Semidynamics, the leading IP company for high performance, AI-enabled, RISC-V processors, is happy to announce that UPMEM has selected Semidynamics as its core provider for its next generation of LPDDR5X Processing In Memory device.

December 2nd, 2024
El sector de los semiconductores destaca la ausencia de producción en Europa y la desglobalización como las principales oportunidades del ecosistema

Durante la Premium Lecture a cargo de Roger Espasa, CEO de Semidynamics, se han abordado las ‘Oportunidades y necesidades en el ecosistema de semiconductores’ en el marco del II Congreso Nacional de Semiconductores (Chipnation) que se celebra en el Caixa Forum Valencia este lunes 2 y martes 3 de diciembre.

December 2nd, 2024
El sector de semiconductores apuesta por el talento para liderar la industria

El sector de los semiconductores en España afronta grandes retos. Sin embargo, cuenta con un recurso clave para liderar su crecimiento como es el talento. Durante la celebración de Chipnation, el Congreso Nacional de la Industria de los Semiconductores, celebrado en Valencia, expertos como Roger Espasa, Mayte Bacete o Teresa Riesgo destacaron la importancia de invertir en talento y reclamaron la puesta en marcha de un grado en semiconductores,  para desarrollar una industria que impulse tanto la innovación como la economía. .

December 1st, 2024
Valencia acoge ChipNation, el congreso que busca destacar a España en el sector de los semiconductores

La segunda edición del ChipNation, el congreso nacional de la industria de los semiconductores, llega a València esta semana con el objetivo de "fortalecer el ecosistema de los semiconductores en España y posicionarlo como un actor clave dentro del marco europeo y global".

March 5th, 2024
Semidynamics puts the power of full core customisation into hands of customers

Semidynamics, the European RISC-V custom core specialist, has released its new tool called ‘Configurator’ that puts the power of Semidynamics’ full customisation of a RISC-V processor core in the hands of the customer. It uses dozens of blocks that have already been verified by Semidynamics so that the final core is therefore also verified. This gives customers an incredible fast time to a workable core design in a matter of a few hours from the thousands of possible variants.

March 5th, 2024
Semidynamics Unveils Revolutionary Configurator Tool for Custom RISC-V Cores Design in Spain

In an innovative leap forward, Semidynamics in Spain has launched a groundbreaking Configurator tool that revolutionizes the way developers design RISC-V cores. This web-based tool, a first in offering full customization of RISC-V IP cores, allows for intricate core design configuration via a user-friendly interface, promising a new era of microprocessor development.

March 5th, 2024
Semidynamics puts the power of full core customisation into hands of customers

Semidynamics, the European RISC-V custom core specialist, has released its new tool called ‘Configurator’ that puts the power of Semidynamics’ full customisation of a RISC-V processor core in the hands of the customer. It uses dozens of blocks that have already been verified by Semidynamics so that the final core is therefore also verified. This gives customers an incredible fast time to a workable core design in a matter of a few hours from the thousands of possible variants.

January 17th, 2024
YorChip, Inc. announces its first Chiplet for Edge AI applications with IP licensed from Semidynamics, the leader in RISC-V IP based in Barcelona

YorChip, Inc. announces its first Chiplet for Edge AI applications with IP licensed from Semidynamics, the leader in RISC-V IP based in Barcelona

January 17th, 2024
YorChip, Inc. announces its first Chiplet for Edge AI applications with IP licensed from Semidynamics, the leader in RISC-V IP based in Barcelona

YorChip, Inc. announces its first Chiplet for Edge AI applications with IP licensed from Semidynamics, the leader in RISC-V IP based in Barcelona

YorChip Edge AI Compute Chiplet with support for UCIe and 10-100+ Int8-TOPS

November 30th, 2023
RISC-V Summit Buzz – Semidynamics Founder and CEO Roger Espasa Introduces Extreme Customization

Founded in 2016 and based in Barcelona, Spain, Semidynamics™ is the only provider of fully customizable RISC-V processor IP.  The company delivers high bandwidth, high performance cores with vector units and tensor units targeted at machine learning and AI applications. There were some recent announcements from Semidynamics leading up to the RISC-V Summit that extend the company’s focus on customization. I had a chance to meet with the company’s CEO at the Summit to get the back-story on what the announcement really means. Read on to get the whole story about how Semidynamics founder and CEO, Roger Espasa, introduces extreme customization.

November 16th, 2023
Semidynamics and Arteris Combine to Push AI and RISC-V Beyond

Arteris, Inc. and Semidynamics are collaborating to enhance the next generation of electronic components for artificial intelligence (AI), machine learning (ML) and high-performance computing (HPC) applications. The agreement sees the interoperability between Semidynamics' Atrevido and Avispado 64-bit RISC-V processor IP cores and Arteris’ Ncore cache coherent network-on-chip (NoC) system IP.

November 10th, 2023
EPI announces the successful bring-up of the EPAC1.5 acceleration chip

The European Processor Initiative (EPI), a project with 30 partners from 10 European countries, with the goal of achieving Europe’s independence in HPC chip technologies and infrastructure, has announced the successful Manufacturing and Silicon Demonstration of its EPAC Accelerator chip version 1.5.

November 8th, 2023
RISC-V Summit 2023: Embedded Editor Report

Also today, Semidynamics announced the launch of its first fully-coherent RISC-V Tensor unit that the company says will not only reduce latency, processor cycles and energy use, it will also, when married to the Vector regulators, solve the memory wall problem. Roger Espasa, CEO & Founder at Semidynamics Technology Services, said the full system is designed to be ideal for AI and machine learning embedded systems, thanks to the new Tensor unit, and the company’s customizable 64-bit cores, married to the vector regulators, Gazzillion data management software, and the unique architecture that brings all these units together in one piece.

November 7th, 2023
Semidynamics Releases RISC-V Tensor Unit for AI

Collaboration with Signature IP yields multicore environment and CHI interconnect customizable for performance and optimizable for efficiency.
Customizability and scalability are among the most common requirements of artificial intelligence and machine learning applications. AI and ML regularly involve complex algorithms and require specialized hardware and software optimizations that promote high performance and efficiency.

November 7th, 2023
[CN] Semidynamics and Arteris collaborate to accelerate AI RISC-V system-on-chip development

California, Campbell - November 2, 2023 - Arteris, Inc. (NASDAQ: AIP) is a leading system IP provider dedicated to accelerating the creation of System-on-Chips (SoCs). Semidynamics is a fully customizable high-bandwidth and high-performance RISC-V processor IP provider. Arteris and Semidynamics announced today the establishment of a partnership to accelerate electronic product innovation for Artificial Intelligence (AI), Machine Learning (ML), and High-Performance Computing (HPC) applications.
This partnership supports the interoperability between Semidynamics' Atrevido™ and Avispado™ 64-bit RISC-V processor IP cores and Arteris' Ncore high-speed Cache Coherent Network-on-Chip (NoC) system IP. This combined solution offers interoperability to expedite the development of AI/ML and HPC designs.

November 7th, 2023
[CN] Semidynamics and Arteris collaborate to accelerate AI RISC-V System-on-Chip development.

Arteris, Inc. (NASDAQ: AIP) is a leading system IP provider dedicated to accelerating the creation of System-on-Chips (SoCs). Semidynamics is a fully customizable high-bandwidth and high-performance RISC-V processor IP provider. Arteris and Semidynamics announced today the establishment of a partnership to accelerate electronic product innovation for Artificial Intelligence (AI), Machine Learning (ML), and High-Performance Computing (HPC) applications.

November 6th, 2023
Arteris and Semidynamics hook up to accelerate SoC design

Arteris, a provider of system IP which accelerates SoC design, and Semidynamics, a provider of fully customisable high bandwidth and high-performance RISC-V processor IP, have partnered to accelerate electronic product innovation for AI, ML and HPC applications.
The partnership supports the interoperability between Semidynamics’ Atrevido and Avispado 64-bit RISC-V processor IP cores and Arteris’ Ncore cache coherent network-on-chip (NoC) system IP.

October 27th, 2023
RISC-V Tensor Unit Enables Energy Efficient AI Processing

Intended for use in ultra-fast artificial intelligence (AI) implementations, a RISC-V Tensor Unit has just been introduced by Semidynamics.
Relying on the company’s configurable 64-bit cores, this presents customers with hardware that is highly optimised to meet the requirements of matrix multiplication workloads. The result is a solution that can handle intense computation demands while still keeping the power budget involved to a minimum. 

October 27th, 2023
[FN] RISC-V jauhamaan tekoälyn suuria kielimalleja

LLM- eli suurten kielimallien merkitys näkyy nyt kaikkialla. Nämä mallit kuten LLaMa-2 tai ChatGPT koostuvat miljardeista parametreista ja vaativat suuren laskentatehon. Tähän useiden biljoonien toimintojen laskentakykyyn pitää pystyä alhaisella energiankulutuksella. Enpanjalaisen Semidynamicsin mukaan RISC-V on laskentaan sopiva alusta.

October 25th, 2023
[FR] Semidynamics et SignatureIP veulent faciliter la conception de puces RISC-V multicœurs grâce à l’intégration d’un "réseau sur puce"

Il existe aujourd’hui une demande croissante pour des puces toujours plus puissantes pour des applications avancées telles que l'intelligence artificielle (IA) et l’apprentissage automatique (ML), technologies qui nécessitent souvent plusieurs cœurs sur une seule puce. Pour faciliter cette évolution en particulier pour des puces RISC-V multicœurs, les sociétés Semidynamics et SignatureIP se sont associées pour intégrer leurs IP respectives afin de fournir un environnement multicœur RISC-V entièrement testé, ainsi qu’une interconnexion CHI (Coherent Hub Interface) pour la conceptions de puces complexes.

October 24th, 2023
Semidynamics launches first fully-coherent RISC-V Tensor unit to supercharge AI applications

Optimised for its 64-bit fully customisable RISC-V cores.
Semidynamics has just announced a RISC-V Tensor Unit that is designed for ultra-fast AI solutions and is based on its fully customisable 64-bit cores.

October 24th, 2023
Semidynamics launches first fully-coherent RISC-V Tensor unit

Semidynamics has announced a RISC-V Tensor Unit that is designed for ultra-fast AI solutions and is based on its fully customisable 64-bit cores.
State-of-the-art Machine Learning models, such as LLaMa-2 or ChatGPT, consist of billions of parameters and require a large computation power in the order of several trillions of operations per second. Consequently, delivering such massive performance while keeping energy consumption low is a significant challenge for hardware design.

October 24th, 2023
[SE] Spansk Risc V-baserad AI-IP

Semidynamics i Barcelona lanserar en neuronkärna baserad på den fria arkitekturen Risc V. Samtidigt presenterar företaget en processorarkitektur för artificiella neuronnät.
Neuronkärnan (omväxlande kallad NPU och TPU, tensorenhet) är inte Semidynamics första Risc V-baserade kärna. Företaget har sedan tidigare en VPU (Vector Processing Unit) och två 64-bitars CPU:er – allt baserat på Risc V.

October 10th, 2023
Semidynamics and Signature IP Expand Multi-Core RISC-V and CHI Options

Two relatively new players in the CPU world, Semidynamics and Signature IP, have announced multi-core RISC-V and CHI interconnect IP for compute-intensive applications like AI/ML.
As some experts predict the end of Moore’s law, the artificial intelligence and machine learning (AL/ML) industry needs to find ways to greatly increase computing power density and efficiency. Such gains call for monolithic multi-core and chiplet architectures and improved interconnects.

October 8th, 2023
Fully-Tested Multi-Core Environment for Development of RISC-V Based Chips

Semidynamics has collaborated with Californian start-up SignatureIP on the creation of a fully-tested interoperable RISC-V, multi-core environment plus CHI interconnect.
It draws on the companies’ respective customisable 64-bit RISC-V processing IP and Coherent NoC IP elements. Consequently, this will be able to help speed-up and de-risk next generation chip design projects - so that demanding artificial intelligence (AI) workloads can be dealt with. SignatureIP’s Coherent NoC IP delivers strong performance alongside inherent scalability. It supports a transport layer for chiplet communication. Semidynamics’ multi-core architecture provides an easily configurable platform for designers to work with.  

October 4th, 2023
RISC-V Environment and CHI Interconnect for AI and ML Applications

Semidynamics and SignatureIP are collaborating to incorporate respected technologies for a completely assessed multi-core RISC-V environment and CHI interconnect for innovations in chip development for AI and ML applications. The solution utilizes SignatureIP’s Coherent NoC, designed to be scalable with the inclusion of a transport layer for chiplet communication and acts as an ordered file system with support for home-node resource group.

October 3rd, 2023
Partnership creates RISC-V multi-core environment

There is an ever-increasing demand for more powerful chip designs for advanced applications, such as AI and ML, that require many cores on one chip and RISC-V technology is particularly suitable for such requirements.
To facilitate this, Semidynamics and SignatureIP have partnered to integrate their respective IPs to provide a fully-tested RISC-V, multi-core environment and CHI interconnect for the development of state-of-the-art chip designs.

October 3rd, 2023
SemiDynamics teams for multicore RISC-V chiplet boost

Semidynamics in Spain has teamed up with SignatureIP in the US to combine multi-core RISC-V IP with CHI interconnect for the development of the latest chiplet AI chips.
SignatureIP’s Coherent network on chip (NoC) IP is designed for chiplet designs and supports a transport layer for chiplet communication using ARM’s Coherent Hub Interface (CHI) interconnect standard.

July 20th, 2023
Semidynamics announces fully customisable, 4-way, Atrevido 423 RISC-V core for big data applications

Semidynamics, the only provider of fully customisable RISC-V processor IP, has launched the next member of its Atrevido family of 64-bit cores. The Atrevido 423 has a wider, 4-way pipeline, allowing for the decoding and retirement of up to two times more instructions than its recently launched, 2-way, 223 core. It is also coupled with more functional units, which significantly increases the IPC (instructions-per-cycle).

July 20th, 2023
Semidynamics announces, 4-way, Atrevido 423 RISC-V core

Semidynamics has launched the next member of its Atrevido family of 64-bit cores. The Atrevido 423 has a wider, 4-way pipeline, allowing for the decoding and retirement of up to two times more instructions than its recently launched, 2-way, 223 core. It is also said to be coupled with more functional units, which significantly increases the IPC (instructions-per-cycle).

July 20th, 2023
[CHI] Semidynamics Releases Fully Customizable Quad Atrevido 423 RISC-V Core for Big Data Applications

Semidynamics, provider of the only fully customizable RISC-V processor IP, launched the next member of the Atrevido family of 64-bit cores. The Atrevido 423 has a wider 4-way pipeline, allowing up to twice as many instructions to be decoded and retired as the recently introduced 2-way 223 core. It is also combined with more functional units, greatly increasing the IPC (instructions per cycle).

June 10th, 2023
Highlights From RISC-V Summit Europe Point to More RISC-V Abstraction

New innovations from the RISC-V Summit Europe are poised to streamline the design process for open-source processors.
As we wrap up the week of RISC-V Summit Europe, here we'll review how companies this week used the event as a platform to reveal their latest innovations leveraging the open instruction set architecture (ISA). These developments encompass both hardware and software, making them important to designers in a breadth of fields.

June 9th, 2023
RISC-V gathers pace in Europe

The RISC-V Summit Europe brought together developers, architects, technical decision and policy makers from across European RISC-V ecosystem for the first time in the region this week.
Attendees from academia, research, SMEs, industry and open source communities  gathered in Barcelona to discuss the technologies and research shaping the future of RISC-V computing, in applications such as Automotive, High Performance Computing, AI, and Security.

June 8th, 2023
Bruselas autoriza 8.100 millones en ayudas para revitalizar la industria europea de microelectrónica

La Comisión Europea ha dado este jueves luz verde al mayor proyecto europeo de interés común (IPCEI) por el que 14 países de la Unión Europea, incluido España, podrán destinar hasta 8.100 millones de euros en ayudas públicas a iniciativas para el desarrollo de microelectrónica y tecnologías de la comunicación.

June 5th, 2023
Customisable RISC-V Vector Unit is largest available, says Semidynamics

At up to 2048bits of computation per cycle, Semidynamics says that its customisable Vector Unit is the largest available in the RISC-V market today, offering “unprecedented data handling”.
At the RISC-V Summit Europe 2023 (05 to 09 June) in Barcelona, Semidynamics highlights the customisable vector unit to accompany the company’s customisable 64-bit RISC-V cores. The Vector Unit complies with the RISC-V Vector Specification 1.0 and has additional, customisable features to enhance data handling capabilities. Semidynamics claimed that together they “set a new standard for data handling both in terms of unprecedented speed and volume”.

June 3rd, 2023
Semidynamics announces largest, fully customisable Vector Unit in the RISC-V market, delivering up to 2048b of computation per cycle

Semidynamics has equipped its Vector Unit with a high-performance, cross-vector-core network that provides all-to-all connectivity between the vector cores at high bandwidth, even for the very large, 32-vector core option. The cross-vector-core unit is used for specific instructions in the RISC-V standard that shuffle data between the different vector cores, such as vrgather, vslide, etc.

June 2nd, 2023
RISC-V Summit: Customisable vector unit

Vector unit are composed of several vector cores that perform multiple calculations in parallel.
In this case, Semidynamics’ vector core can be tailored to support FP64, FP32, FP16, BF16, INT64, INT32, INT16 or INT8 data types depending on requirements – the longest word-length implemented defines the vector core width (‘ELEN’).