Event
Roger Espasa, Semidynamics' CEO, participated at the Third Annual RISC-V Summit
Dec 9th, 2020
| Third Annual RISC-V Summit
Key Takeaways:
- Two new families of cores will be introduced: in-order and out-of-order
- Very high-bandwidth capable. Ideal for SoC/Domains where high bandwidth an low area is needed
- Open Vector Interface that will facilitate developing specialized vector units will be disclosed