November 08, 2023
Embedded Computing Design
RISC-V Summit 2023: Embedded Editor Report
Also today, Semidynamics announced the launch of its first fully-coherent RISC-V Tensor unit that the company says will not only reduce latency, processor cycles and energy use, it will also, when married to the Vector regulators, solve the memory wall problem. Roger Espasa, CEO & Founder at Semidynamics Technology Services, said the full system is designed to be ideal for AI and machine learning embedded systems, thanks to the new Tensor unit, and the company’s customizable 64-bit cores, married to the vector regulators, Gazzillion data management software, and the unique architecture that brings all these units together in one piece.
November 07, 2023
EE Times Europe
Semidynamics Releases RISC-V Tensor Unit for AI
Collaboration with Signature IP yields multicore environment and CHI interconnect customizable for performance and optimizable for efficiency.
November 07, 2023
Customizability and scalability are among the most common requirements of artificial intelligence and machine learning applications. AI and ML regularly involve complex algorithms and require specialized hardware and software optimizations that promote high performance and efficiency.
[CN] Semidynamics and Arteris collaborate to accelerate AI RISC-V system-on-chip development
California, Campbell - November 2, 2023 - Arteris, Inc. (NASDAQ: AIP) is a leading system IP provider dedicated to accelerating the creation of System-on-Chips (SoCs). Semidynamics is a fully customizable high-bandwidth and high-performance RISC-V processor IP provider. Arteris and Semidynamics announced today the establishment of a partnership to accelerate electronic product innovation for Artificial Intelligence (AI), Machine Learning (ML), and High-Performance Computing (HPC) applications.
This partnership supports the interoperability between Semidynamics' Atrevido™ and Avispado™ 64-bit RISC-V processor IP cores and Arteris' Ncore high-speed Cache Coherent Network-on-Chip (NoC) system IP. This combined solution offers interoperability to expedite the development of AI/ML and HPC designs.